RISC-V security: First piece of the puzzle falls into place


By Thomas Claburn

10 Sep 2018 at 20:08

Credits: http://www.theregister.co.uk/2018/09/10/sifive_hex_five_riscv_secure_environment/


If you’ve been looking at SiFive‘s RISC-V-based chip technology and thinking, y’know what, it’s missing an Arm TrustZone-style element to run sensitive code, well, here’s some good news.

And if you’re just into processor design and checking out alternatives to Arm CPU cores, then this may be some interesting news.

SiFive helps organizations turn semiconductor designs based on the open-source RISC-V instruction set architecture (ISA) into chips. On Monday, it announced it has integrated Hex Five Security’s MultiZone Security trusted execution environment (TEE) into its Freedom SDK.

The technical confection gives companies creating RISC-V chips the tools to implement a security environment comparable to ARM’s TrustZone, though perhaps without past flaws. It should help users of the SiFive toolchain bring security-enforcing silicon to market faster.

Hex Five‘s technology, as its name suggests, allows for the creation of multiple isolated zones in which sensitive code – such as secure boot procedures and cryptographic routines – can run without interference from other programs or operating systems executing at the same time. It works with a Configurator tool that combines the compiled code with a Hex Five nanokernel to run within the secured environment.

TEEs partition the processor in distinct zones and attempt to maintain separation between them to the extent that’s possible. Related work is being done by MIT and UC Berkeley boffins to develop an open source secure enclave called Keystone, one component in a TEE.


In a phone interview with The Register, Don Barnetson, cofounder of Hex Five, explained that the TEE sits at the bare metal level and is used to secure the root of trust and authentication below the operating system. A secure enclave like Keystone, he said, would be used to secure a Linux app from other pieces of Linux.

He sees Keystone as complementary to MultiZone.

“RISC-V is an open source ISA,” he said. “The ISA is the contract between the software and hardware. MultiZone allows you to secure that ISA for the first time. Security is often so complicated that people just don’t bother. Our goal is to make it easier.”

MultiZone is being made available through the SiFive Software Ecosystem program, by which participating vendors provide hardware-making customers with IP at little or not cost, to allow chip products to be brought to market before IP bills come due.

“History shows that the complexity associated with properly implementing security technologies often results in them not being used at all,” said Cesare Garlati, co-founder of Hex-Five, in a statement. “Our mission is to enable mainstream adoption of security best practices by simplifying their deployment.”

The RISC-V ISA, backed by the RISC-V Foundation and companies such Google, Nvidia, Western Digital, and Samsung, among others, offers an open, royalty-free set of instruction that companies can use in custom processors.

Chip designer Arm, which charges for its silicon blueprints, has had its feathers ruffled by RISC-V because it represents a potential competitor, once the project matures. The Softbank-owned company launched an anti-RISC-V website in late June, and then removed it after about two weeks after criticism from its own staff and the broader tech industry.

Physically Unclonable Functions – A new way to establish trust in silicon

Credits: Embedded World Conference 2018, ISBN 978-3-645-50173-6, http://www.embedded-world.eu

Download full paper https://bringyourownit.files.wordpress.com/2018/03/puf-physically-unclonable-functions-a-new-way-to-establish-trust-in-silicon.pdf

Abstract — As billions of devices connect to the Internet, security and trust become crucial. This paper proposes a new approach to provisioning a root of trust for every device, based on Physical Unclonable Functions (PUFs). PUFs rely on the unique differences of each silicon component introduced by minute and uncontrollable variations in the manufacturing process. These variations are virtually impossible to replicate. As such they provide an effective way to uniquely identify each device and to extract cryptographic keys used for strong device authentication. This paper describes cutting-edge real-world applications of SRAM PUF technology applied to a hardware security subsystem, as a mechanism to secure software on a microcontroller and as a basis for authenticating IoT devices to the cloud.


The Internet of Things already connects billions of devices and this number is expected to grow into the tens of millions in the coming years [5]. To build a trustworthy Internet of Things, it is essential for these devices to have a secure and reliable method to connect to services in the cloud and to each other. A trustworthy authentication mechanism based on device-unique secret keys is needed such that devices can be uniquely identified and such that the source and authenticity of exchanged data can be verified.

In a world of billions of interconnected devices, trust implies more than sound cryptography and resilient transmission protocols: it extends to the device itself, including its hardware and software. The main electronic components within a device must have a well-protected security boundary where cryptographic algorithms can be executed in a secure manner, protected from physical tampering, network attacks or malicious application code [18]. In addition, the cryptographic keys at the basis of the security subsystem must be securely stored and accessible only by the security subsystem itself. The actual hardware and software of the security subsystem must be trusted and free of known vulnerabilities. This can be achieved by reducing the size of the code to minimize the statistical probability of errors, by properly testing and verifying its functionality, by making it unmodifiable for regular users and applications (e.g. part of secure boot or in ROM) but updateable upon proper authentication (to mitigate eventual vulnerabilities before they are exploited on a large scale). Ideally, an attestation mechanism is integrated with the authentication mechanism to assure code integrity at the moment of connecting to a cloud service [3].

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Embedded World 2017 – IoT coming of age.

Last week I had the pleasure of attending Embedded World 2017 in Germany as I was invited to give a couple of presentations on the pioneering work we have been doing at the prpl Foundation with regards to the prplHypervisor™ and prplPUF™ APIs for securing IoT. As it turns out, IoT was the top line at the conference that drew in more than 30,000 trade visitors – and the event solidified the notion that embedded computing is now synonymous with IoT.

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