How to Secure a RISC-V Embedded System in Just 30 Minutes
March 1, 2019 Leave a comment
Credits: Embedded World Conference 2019 Proceedings, http://www.embedded-world.eu
Abstract — The free and open RISC-V ISA defines many important building blocks of security. Properly implementing them is the system designer responsibility. So, the real question is: How does one properly secure a RISC-V embedded system? This paper offers a practical guide to using these security blocks to build a state-of-the-art Trusted Execution Environment (TEE) with a multitude of isolated security domains – Zones, and secure communications between them. The paper also shows how to verify Zone isolation and benchmark overall TEE system performance.
INTRODUCTION
Originally developed at U.C. Berkeley, the free and open RISC-V ISA promises to bring the innovation and collaboration of the open source community to the hardware world. When it comes to security, RISC-V specifications [1] provide many important building blocks and the rapidly growing RISC-V ecosystem even more. For designers used to traditional closed-source proprietary architectures, the complexity associated with properly implementing these new security technologies may prove daunting [2].
From a system design perspective, the real question is: How do I properly secure a RISC-V embedded system? In this paper, we describe how to secure a RISC-V system using the free and open MultiZone Security Trusted Execution Environment (TEE) – developed and maintained by Hex Five Security, Inc. MultiZone Security provides signed boot, hardware enforced isolation for an unlimited number of security domains – Zones, a secure messaging system between Zones, secure interrupts, and operates on top of the standard RISC-V ISA.
By James O’Malley – original post at 
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